×
saleh mesbah abed hafees
• Department of Computer Engineering - Faculty Member

  • Ph.D. of Computer Engineering from University of Texas At El Paso,Af*, 1997
  • Msc. of Engineering from New Mexico State University, 1991
  • Bsc. of Electrical Engineering from Tennessee State University, 1985

    Patent
  • SALEH M. ABED HAFEES, "Single Rail Domino Logic for Four-Phase Clocking Scheme", 6265899, Jul 2001
  • SALEH M. ABED HAFEES, "System and Method for Efficiently Implementing a Double Data Rate Memory Architecture", . 6356509, Mar 2002
  • SALEH M. ABED HAFEES, "External Power Ring With Multiple Tapings to Reduce IR Drop in Integrated Circuit", 20040211982A1, Oct 2004

  • Publications
  • SALEH M. ABED HAFEES, Low-Power Content Addressable Memory With Read/Write And Matched Mask Ports, Springer-Verlag Berlin Heidelberg 2007, 2007, LOW-POWER
  • SALEH M. ABED HAFEES, "High-Speed and Low-Power Scalable Hamming Weight Comparator Based on a Nonweighted Switched-Capacitor Array," Journal of Circuits, Systems, and Signal Processing, Springer Publishing Inc., vol. 75, no. 3, pp. 417-434, 2013
  • SALEH M. ABED HAFEES, "Scalable Digital CMOS Comparator Using a Parallel Prefix Tree," Journal of IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 21, no. 11, pp. 1989-1999, 2013
  • SALEH M. ABED HAFEES, "A Gigahertz Digital CMOS Divide-by-N Frequency Divider Based on a State Look-Ahead Structure," Journal of Circuits, Systems, and Signal Processing, Springer Publishing Inc, vol. 11, no. 12, pp. 1-12, 2011
  • SALEH M. ABED HAFEES, "A Digital CMOS Parallel Counter Architecture Based on State Look-Ahead logic," Journal of IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 19, no. 6, pp. 1023-1033, 2011
  • SALEH M. ABED HAFEES, "A Shadow Dynamic Finite State Machine for Branch Prediction: An alternative for the 2-bit Saturating Counter," An International Journal of Computing and Informatics, vol. 35, no. 1, pp. 103-124, 2010
  • SALEH M. ABED HAFEES, "CMOS Eight-Transistor Memory Cell for Low-Dynamic-Power High-speed Embedded SRAMS," Journal of Circuits, Systems and Computers, vol. 17, no. 5, pp. 845-863, 2008
  • SALEH M. ABED HAFEES, "A NOVEL METHODOLOGY FOR REDUCING THE POWER SUPPLY VOLTAGE DROP AT THE CORE OF IC?S CHIPS," Journal of ELECTRICAL ENGINEERING, vol. 58, no. 3, pp. 177-179, 2007
  • SALEH M. ABED HAFEES, "A VLSI High Performance Priority Encoder Using Standard CMOS Library," Journal of IEEE Transactions on Circuits and Systems II, vol. 53, no. 3, pp. 597-601, 2006
  • SALEH M. ABED HAFEES, "A VLSI Modified Architecture for Reduced Symmetric Fuzzy Singleton Set and its applications," SPIE, vol. 3, no. 2, pp. 48-63, 1997
  • SALEH M. ABED HAFEES, "A mixed analog-digital fast Hamming-weight Filtering Circuit using switched-capacitor arrays," Analog Integrated Circuits and Signal Processing, vol. 83, no. 1, pp. 35-44, 2015
  • SALEH M. ABED HAFEES, "A Comparison-Free Sorting Algorithm," IEEE 11th International SoC Design Conference, Nov 2014, pp. 0-0, IEEE
  • SALEH M. ABED HAFEES, "A DOUBLE DATA RATE 8T-CELL SRAM ARCHITECTURE FOR SYSTEMS-ON-CHIP," IEEE 14Th International Symposium on System-on-Chip, Oct 2012, pp. 0-0, IEEE
  • SALEH M. ABED HAFEES, "On-chip Jitter Measurement Architecture Using A Delay-Locked Loop with Vernier Delay Line, to the order of Giga Hertz," IEEE 18th International conference Mixed Design on Integrated Circuits and Systems , May 2011, pp. 0-0, IEEE
  • SALEH M. ABED HAFEES, "High Speed Digital CMOS Divide-by-N Frequency Divider," Symposium on IEEE International Circuits and Systems, (ISCAS) , Sep 2008, pp. 0-0, IEEE
  • SALEH M. ABED HAFEES, "High Performance AES Design Using Pipelining Structure Over GF((24)2)," IEEE International Conference on Signal Processing and Communication, Nov 2007, pp. 0-0, IEEE
  • SALEH M. ABED HAFEES, "Low-Power Content Addressable Memory With Read/Write And Matched Mask Ports," PATMOS 2007, , pp. 0-0, SPRINGER
  • SALEH M. ABED HAFEES, "A Fuzzy Processor Based on Symmetric Triangular Membership Functions," ISSCI, World Automation Congress, , pp. 0-0, IEEE
  • SALEH M. ABED HAFEES, "ASIC's Approach Implementation of a Symmetric Triangular Fuzzy Coprocessor and its Application to Adaptive Filtering," accepted at NASA university research center's technical conference on education, aeronautics, space, autonomy, earth and environment (URC-TC '97), Feb 1997, pp. 0-0, NASA
  • SALEH M. ABED HAFEES, "ASIC's Approach Implementation of a Symmetric Triangular Fuzzy Coprocessor and its Application to Adaptive Filtering," NASA university research center's technical conference on education, aeronautics, space, autonomy, earth and environment (URC-TC '97), , pp. 0-0, NASA
  • SALEH M. ABED HAFEES, "VLSI design of an image multi-resolution transform for lossy compression," NASA university research center's technical conference on education aeronautics, space, autonomy, earth and environment (URC-TC '97), Feb 1997, pp. 0-0, NASA
  • "A Comparison-Free Sorting Algorithm On CPUs And GPUs", The Journal of Supercomputing
  • "A novel self?timing CMOS first?edge take?all circuit for on?chip communication systems", IET Computers & Digital Techniques
  • "An Efficient O(N) Comparison-Free Sorting Algorithm", IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
  • "Design of memory Alias Table based on the SRAM 8T-Cell", International Journal of Circuit Theory and Applications
  • "High-Speed Low-Power Flash ADC Architecture Using Switched-Capacitor Positive Feedback Comparator and Parallel Single-Gate Encoder", Circuits, Systems, and Signal Processing
  • "Investigation of a single-axis discrete solar tracking system for reduced actuations and maximum energy collection", Automation in Construction
  • "Programmable Feedback Shift Register", Circuits, Systems, and Signal Processing
  • "Reconfigurable FIFO memory circuit for synchronous and asynchronous communication", saleh M Abdel-hafeez
  • "Sorting-free digital median filter for SOCs", Analog Integrated Circuits and Signal Processing
  • Deputy Head of Department, Department of Computer Engineering, Sep 2012 - Sep 2013
  • Vice Dean, Faculty Of Computer And Information Technology, Sep 2006 - Sep 2007
  • Deputy Head of Department, Department of Computer Engineering, Sep 2005 - Sep 2006
  • Assistant Dean, Faculty Of Computer And Information Technology, Sep 2003 - Sep 2005
  • Faculty Member, Department of Computer Engineering, Feb 2002 - Present
  • Member of Technical Staff at S3 and Altera, S3 and Altera, U.S.A, Jan 1997- Apr 2003
  • ADVANCED COMPUTER ARCHITECTURE
  • ADVANCED DIGITAL SYSTEMS DESIGN
  • APPLIED PROBABILITY AND QUEUING THEORY
  • COMPUTER DESIGN
  • COMPUTER ORGANIZATION AND DESIGN
  • COMPUTER SYSTEMS PROJECT
  • DATA COMMUNICATION
  • DIGITAL INTEGRATED CIRCUITS
  • DIGITAL INTEGRATED CIRCUITS LAB
  • DIGITAL LOGIC DESIGN
  • DIGITAL LOGIC DESIGN AND COMPUTER ARCHITECTURE (NON-CIE STUDENTS)
  • DIGITAL LOGIC DESIGN LAB
  • DIGITAL LOGIC DESIGN LAB (NON-CPE-STUDENTS)
  • Digital Logic Design
  • Digital Logic Design Lab
  • ENGINEERING COMPUTATIONS
  • ENGINEERING COMPUTATIONS LAB
  • HDL COMPUTER DESIGN LAB
  • HIGH-PERFORMANCE COMPUTER ARCHITECTURE
  • MICROCONTROLLERS LAB
  • MICROPROCESSOR SYSTEMS
  • MICROPROCESSOR INTERFACING LAB
  • MICROPROCESSOR SYSTEMS
  • MICROPROCESSOR SYSTEMS (Non CPE students)
  • MICROPROCESSOR SYSTEMS DESIGN
  • MICROPROCESSOR SYSTEMS DESIGN LAB
  • OPERATING SYSTEMS
  • PRACTICAL TRAINING
  • PRACTICAL TRAINING
  • PRACTICAL TRAINING (1)
  • PRACTICAL TRAINING (2)
  • SEMINAR IN COMPUTER ENGINEERING
  • SPECIAL TOPICS IN COMPUTER ENGINEERING (3)
  • VLSI DESIGN
  • WORKSHOP IN COMPUTERS MAINTENANCE AND OPERATION
    Technical Paper Reviews
  • MSSP Based Scheduling for A Computational Efficient SpMxV, Journal
  • Parallel, Multiplierless Multidimensional CDF 9/7 DWT, Journal
    Conference Duties
  • ICICS?16, Jordan, Panelist
    Editorial Boards
  • ICICS?16, 2016 -2016
    Professional Memberships
  • IEEE, 2016, VLSI & CIRCUIT & SYSTEMS