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abdulla mohammed bataineh
• Department of Computer Engineering - Faculty Member

  • Ph.D. of Computer Engineering from Ohio State University, 1992
  • Msc. of Electrical Engineering from Ohio State University, 1988
  • Bsc. of Electrical Engineering from Yarmouk University, 1987

    Patent
  • Abdulla M. Bataineh, "INCREASINGLY MINIMAL BIAS ROUTING", 20140140341, May 2014
  • Abdulla M. Bataineh, "Configurable vector length computer processor", 20120221830, Dec 2013
  • Abdulla M. Bataineh, "MULTIPROCESSOR COMPUTER CACHE COHERENCE PROTOCOL", 20100318741, Dec 2010
  • Abdulla M. Bataineh, "HIERARCHICAL SHARED SEMAPHORE REGISTERS", 20100115236, May 2010
  • Abdulla M. Bataineh, "Optimized high bandwidth cache coherence mechanism", 7409505, Aug 2008
  • Abdulla M. Bataineh, "Efficient memory structure simulation for sequential circuit design verification", 6813599, Nov 2004

  • Publications
  • Abdulla Bataineh, Mike Aamodt, Kevin Thomas, "A Parallel and Vector Implementation of Circuit Simulation on Cray Supercomputers. ," Parallel Algorithms Appl. , vol. 12, no. 2, pp. 109-118, 1999
  • Bülent Abali, Füsun Özgüner, Abdulla Bataineh, " Balanced Parallel Sort on Hypercube Multiprocessors. ," IEEE Trans. Parallel Distrib. Syst., vol. 4(5), no. B?lent Abali, F?sun ?zg?ner, Abdulla Bataineh: Balanced Parallel Sort on Hy, pp. 572-581, 1993
  • Abdulla Bataineh, Robert Lee, Füsun Özgüner, "Electrical characterization of high-speed interconnects with a parallel three-dimensional finite-difference time-domain algorithm," Simulation, vol. 64, no. 5, pp. 289-295, 1995
  • Abdulla Bataineh, Füsun Özgüner, Imre Szauter, "Parallel and Vector Logic and Fault Simulation Algorithms on the Cray Y-MP Supercomputer," Simulation, vol. 61, no. 3, pp. 161-168, 1993
  • S Qatu, Abdulla Bataineh, "Structural analysis of shallow shells on the CRAY Y-MP supercomputer," Computers & structures, vol. 45, no. 3, pp. 453-459, 1992
  • Abdulla Bataineh, F. Ozguner and A. Sarwal , "Parallel Boolean operations for information retrieval," Information Processing Letters, vol. 39, no. , pp. 99-108, 1991
  •   G. Faanes, A. Bataineh, D. Roweth, T. Court, E. Froese, B. Alverson, T. Johnson, J. Kopnick, M. Higgins, and J. Reinhard , "Cray cascade: a scalable HPC system based on a Dragonfly network," SC '12 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis, Nov 2012, pp. 0-0
  • Dennis Abts, Abdulla Bataineh, Steve Scott, Greg Faanes, James Schwarzmeier, Eric Lundberg, Tim Johnson, Mike Bye, and Gerald Schwoerer., " The Cray BlackWidow: a highly scalable vector multiprocessor," Proceedings of the 2007 ACM/IEEE Conference on Supercomputing, Nov 2007, pp. 0-0
  • A. Bataineh, F. Ozguner, and I. Szauter , "Parallel logic and fault simulation algorithms for shared memory vector machines," ICCAD92, Nov 1992, pp. 0-0, IEEE
  • Dennis Abts, David Lilja, Abdulla Bataineh, Steve Scott, "Dimensions of verifying the hardware-software interface in a shared-memory multiprocessor" , technical report forUMSI research report/University of Minnesota May 1999
  • Faculty Member, Department of Computer Engineering, Sep 2000 - Present
  • Head of the Center, Director's Office, Feb 1996 - Aug 1996
  • Faculty Member, Electrical Engineering, Sep 1995 - Aug 1996
  • Sr Hardware Architect, Google , U.S.A, Jan 2013- Sep 2015
  • Principal Architect , Cray Inc, U.S.A, Jun 2007- Sep 2011
  • Hardware Architect, Cray Research, U.S.A, Sep 1998- Sep 2000
  • Hardware Architect, Silicon Graphics (SGI), U.S.A, Aug 1996- Sep 1998
  • ADVANCED COMPUTER ARCHITECTURE
  • ADVANCED OPERATING SYSTEMS
  • ARTIFICIAL INTELLIGENCE
  • COMPILER STRUCTURES
  • COMPUTER ARCHITECTURE
  • DIGITAL LOGIC DESIGN LAB
  • DIGITAL LOGIC DESIGN LAB (NON-CPE-STUDENTS)
  • DISTRIBUTED SYSTEMS AND MIDDLEWARE
  • HIGH-PERFORMANCE COMPUTER ARCHITECTURE
  • OPERATING SYSTEMS
  • OPERATING SYSTEMS
  • PARALLEL COMPUTING
  • SEMINAR IN COMPUTER ENGINEERING
  • SOFTWARE DESIGN AND DEVELOPMENT PROJECT
  • SPECIAL TOPICS IN COMPUTER ENGINEERING (3)