CPE 552: Computer Design

Spring Term 2009

Jordan University of Science and Technology-JUST





Motivation and Objectives:

Welcome to the computer design course. Computers are widely used in our daily life applications. This course introduces the techniques used in computer design. The basic background in digital design will be introduced in this course, and then be used in designing the the different components of the computer, such as registers, memory, ALU and CPU. In this course, we will learn about the CAD tools used in the design process and how to use them. Examples and projects on VHDL will be given to facilitate the learning process. Our goal for this course is to expose the students to fundamental concepts in the area, work with the design of basic/advanced computer components design, and at the same time provide problems and projects that deal with more advanced/research topics.

Homework Assignment

  • HW1 Due date Wed 18/3/2009 in the class.
  • HW2 Due date Mon 18/5/2009 in the class (Hard copy only).
  • HW3 Due date
  • HW4 Due date

work assignments can  be submitted by e-mail to: tawalbeh@just.edu.jo, (but hardcopies are also accepted).  Please name your file as your last name followed by homework number, followed by course number (552), for example, tawalbeh-hw1-552.pdf.
Also make sure that your name and number is printed within the homework file.


Project 1 : Using VHDL and ModelSim, build an ALU that performs the tasks described in the sheet        given to you in the class. Due date: Mon 30/3/2009 in the lab.

Project 2: Using VHDL, build the CPU described in your class notes. Simulate it for functional correctness using ModelSim. Then Synthesize it using Leonardo.

Deadlines for project 2:  should be submitted Wed 27/5/2009. The deadline for the schematic paper design will be Wed 13/5/2009.


  • First exam: Wed 25/3/2009, from 11:15-12:15 in A2124.
  • Second exam: Mon 18/5/2009 form 11:15-12:15 in A2124.

Plan of the Course-Slide

  • Week 1, 2: Introduction and general overview of the course.
  • Week 3, 4, 5: Combinational components design. VHDL basic concepts.
  • Week 6: Introducing the CAD tools used in computer design.
  • Week 7: FPGAs, and it use in implementing basic Boolean functions.
  • Week 8: Arithmetic units design and implementation in VHDL.


  • Sudhakar Yalmanchili. VHDL Starter's Guide. Prentice Hall, 1998. ISBN: 0-13-519802-x

Grading Policy

  • HW Assignments And Quizzes 12%
  • projects: 18 %
  • First Exam : 15  %
  • Second Exam: 15%
  • Final : 40%


CPE 551: Advanced Computer Architecture.

Dr. Lo'ai A. Tawalbeh

11 May 2009